1. Field of the Invention
The present invention relates to a semiconductor device which includes a circuit including a semiconductor element such as a transistor, and a method for manufacturing the semiconductor device. For example, the present invention relates to an electronic device which includes, as a component, a power device mounted on a power supply circuit; a semiconductor integrated circuit including a memory, a thyristor, a converter, an image sensor, or the like; an electro-optical device typified by a liquid crystal display panel; a light-emitting display device including a light-emitting element; or the like.
Note that in this specification, a semiconductor device means any device that can function by utilizing semiconductor characteristics. An electro-optical device, a light-emitting display device, a semiconductor circuit, and an electronic device are all semiconductor devices.
2. Description of the Related Art
A transistor formed over a glass substrate or the like is manufactured using amorphous silicon, polycrystalline silicon, or the like, as typically seen in a liquid crystal display device. Although a transistor including amorphous silicon has low field-effect mobility, it can be formed over a larger glass substrate. On the other hand, although a transistor including polycrystalline silicon has high field-effect mobility, it is not suitable for being formed over a larger glass substrate.
In view of the foregoing, attention has been drawn to a technique by which a transistor is manufactured using an oxide semiconductor, and such a transistor is applied to an electronic device an optical device. For example, Patent Document 1 and Patent Document 2 disclose a technique in which a transistor is manufactured using zinc oxide or an In—Ga—Zn-based oxide as an oxide semiconductor and such a transistor is used as a switching element or the like of a pixel of a display device.
Patent Document 3 discloses a technique in which in a staggered transistor including an oxide semiconductor, a highly conductive oxide semiconductor including nitrogen is provided as buffer layers between a source region and a source electrode and between a drain region and a drain electrode, and thereby the contact resistance between the oxide semiconductor and the source electrode and between the oxide semiconductor and the drain electrode is reduced.
Further, Non-Patent Document 1 discloses an oxide semiconductor transistor in which a source region and a drain region are formed using an oxide semiconductor whose resistivity is reduced by a self-aligned process in which argon plasma treatment is performed on an exposed portion of the oxide semiconductor.
However, in this method, argon plasma treatment is performed on the exposed surface of the oxide semiconductor; therefore, regions of the oxide semiconductor, which are to be the source region and the drain region are etched at the same time, which makes the source region and the drain region thin (see FIG. 8 in Non-Patent Document 1). As a result, resistance of the source region and the drain region is increased, and defective units due to over-etching caused by unnecessary thinning of a layer are produced more frequently.
This phenomenon is serious in the case where the atomic radius of ion species used in the plasma treatment performed on the oxide semiconductor is large.
The problem would not arise when an oxide semiconductor layer is thick enough. In the case where the channel length is less than or equal to 200 nm, the thickness of a portion of an oxide semiconductor layer to be a channel is required to be less than or equal to 20 nm, preferably less than or equal to 10 nm in order to prevent a short channel effect. Plasma treatment such as the one described above is not favorable to be performed in the case where such a thin oxide semiconductor layer is used.